Thermal oxidation

Furnaces used for diffusion and thermal oxidation at LAAS technological facility in Toulouse, France.

In microfabrication, thermal oxidation is a way to produce a thin layer of oxide (usually silicon dioxide) on the surface of a wafer. The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Massoud model and Deal–Grove model. Thermal oxidation may be applied to different materials, but most commonly involves the oxidation of silicon substrates to produce silicon dioxide. It is commonly used for the surface passivation process and semiconductor device fabrication.

The chemical reaction

Thermal oxidation of silicon is usually performed at a temperature between 800 and 1200 °C, resulting in so called High Temperature Oxide layer (HTO). It may use either water vapor (usually UHP steam) or molecular oxygen as the oxidant; it is consequently called either wet or dry oxidation. The reaction is one of the following:

${\rm {Si+2H_{2}O\rightarrow SiO_{2}+2H_{2\ (g)}}}$

${\rm {Si+O_{2}\rightarrow SiO_{2}\,}}$

The oxidizing ambient may also contain several percent of hydrochloric acid (HCl). The chlorine removes metal ions that may occur in the oxide.

Thermal oxide incorporates silicon consumed from the substrate and oxygen supplied from the ambient. Thus, it grows both down into the wafer and up out of it. For every unit thickness of silicon consumed, 2.17 unit thicknesses of oxide will appear. If a bare silicon surface is oxidized, 46% of the oxide thickness will lie below the original surface, and 54% above it.

Deal-Grove model

Main article: Deal-Grove model

According to the commonly used Deal-Grove model, the time τ required to grow an oxide of thickness X_o, at a constant temperature, on a bare silicon surface, is:

$\tau ={\frac {X_{o}^{2}}{B}}+{\frac {X_{o}}{({\frac {B}{A}})}}$

where the constants A and B relate to properties of the reaction and the oxide layer, respectively. This model has further been adapted to account for self-limiting oxidation processes, as used for the fabrication and morphological design of Si nanowires and other nanostructures.

If a wafer that already contains oxide is placed in an oxidizing ambient, this equation must be modified by adding a corrective term τ, the time that would have been required to grow the pre-existing oxide under current conditions. This term may be found using the equation for t above.

Solving the quadratic equation for X_o yields:

$X_{o}(t)=A/2\cdot \left[{\sqrt {1+{\frac {4B}{A^{2}}}(t+\tau )}}-1\right]$

Massoud model

Main article: Massoud model

History

Further information: Surface passivation, Massoud model, and Deal–Grove model

Mohamed M. Atalla developed the process of surface passivation by thermal oxidation in 1957

The thermal oxidation process was developed in the late 1950s by Egyptian engineer Mohamed Atalla. In 1955, Carl Frosch and Lincoln Derick at Bell Telephone Laboratories (BTL) accidentally discovered that silicon dioxide could be grown on silicon. In the late 1950s, Atalla further discovered that the formation of a thermally grown SiO₂ layer greatly reduced the concentration of electronic states at the silicon surface, and discovered the important quality of SiO₂ films to preserve the electrical characteristics of p–n junctions and prevent these electrical characteristics from deteriorating by the gaseous ambient environment. He found that silicon oxide layers could be used to electrically stabilize silicon surfaces. He developed the surface passivation process, a new method of semiconductor device fabrication that involves coating a silicon wafer with an insulating layer of silicon oxide so that electricity could reliably penetrate to the conducting silicon below. By growing a layer of silicon dioxide on top of a silicon wafer, Atalla was able to overcome the surface states that prevented electricity from reaching the semiconducting layer. For the surface passivation process, he developed the method of thermal oxidation, which was a breakthrough in silicon semiconductor technology.

After the thermal oxidation process was developed by Mohamed Atalla, he initially used it for the surface passivation of silicon semiconductors, before he later used the process to fabricate the first MOSFETs (metal-oxide-semiconductor field-effect transistors) with Dawon Kahng at Bell Labs. The process was adopted by Fairchild Semiconductor for technologies which enable the fabrication of silicon integrated circuits (such as the planar process and CMOS). By the mid-1960s, Atalla's process for oxidized silicon surfaces was used to fabricate virtually all integrated circuits and silicon devices.

The Deal–Grove model is used to predict and interpret thermal oxidation of silicon in semiconductor device fabrication. The model was published in 1965 by Bruce Deal and Andrew Grove of Fairchild Semiconductor, building on Mohamed M. Atalla's work on silicon surface passivation by thermal oxidation at Bell Labs in the late 1950s.

Hisham Z. Massoud introduced the Massoud model of thermal oxidation in 1985

In the 1980s, it became necessary to update the Deal-Grove model in order to model thin oxides. An approach that more accurately models thin oxides is the Massoud model, developed by Hisham Z. Massoud in 1985. The Massoud model is analytical and based on parallel oxidation mechanisms. It changes the parameters of the Deal-Grove model to better model the initial oxide growth with the addition of rate-enhancement terms. The Massoud model is the most suitable for thin oxide films. It isthe most widely used thermal oxidation model in nanoelectronics and nanotechnology.

Oxidation technology

Most thermal oxidation is performed in furnaces, at temperatures between 800 and 1200 °C. A single furnace accepts many wafers at the same time, in a specially designed quartz rack (called a "boat"). Historically, the boat entered the oxidation chamber from the side (this design is called "horizontal"), and held the wafers vertically, beside each other. However, many modern designs hold the wafers horizontally, above and below each other, and load them into the oxidation chamber from below.

Vertical furnaces stand higher than horizontal furnaces, so they may not fit into some microfabrication facilities. However, they help to prevent dust contamination. Unlike horizontal furnaces, in which falling dust can contaminate any wafer, vertical furnaces use enclosed cabinets with air filtration systems to prevent dust from reaching the wafers.

Horizontal furnaces typically have convection currents inside the tube which causes the bottom of the tube to be slightly colder than the top of the tube. As the wafers lie vertically in the tube the convection and the temperature gradient with it causes the top of the wafer to have a thicker oxide than the bottom of the wafer. Vertical furnaces solve this problem by having wafer sitting horizontally, and then having the gas flow in the furnace flowing from top to bottom, significantly damping any thermal convections.

Vertical furnaces also allow the use of load locks to purge the wafers with nitrogen before oxidation to limit the growth of native oxide on the Si surface.

Oxide quality

Wet oxidation is preferred to dry oxidation for growing thick oxides, because of the higher growth rate. However, fast oxidation leaves more dangling bonds at the silicon interface, which produce quantum states for electrons and allow current to leak along the interface. (This is called a "dirty" interface.) Wet oxidation also yields a lower-density oxide, with lower dielectric strength.

The long time required to grow a thick oxide in dry oxidation makes this process impractical. Thick oxides are usually grown with a long wet oxidation bracketed by short dry ones (a dry-wet-dry cycle). The beginning and ending dry oxidations produce films of high-quality oxide at the outer and inner surfaces of the oxide layer, respectively.

Mobile metal ions can degrade performance of MOSFETs (sodium is of particular concern). However, chlorine can immobilize sodium by forming sodium chloride. Chlorine is often introduced by adding hydrogen chloride or trichloroethylene to the oxidizing medium. Its presence also increases the rate of oxidation.

Other notes

Thermal oxidation can be performed on selected areas of a wafer, and blocked on others. This process, first developed at Philips, is commonly referred to as the local oxidation of silicon (LOCOS) process. Areas which are not to be oxidized are covered with a film of silicon nitride, which blocks diffusion of oxygen and water vapor due to its oxidation at a much slower rate. The nitride is removed after oxidation is complete. This process cannot produce sharp features, because lateral (parallel to the surface) diffusion of oxidant molecules under the nitride mask causes the oxide to protrude into the masked area.

Because impurities dissolve differently in silicon and oxide, a growing oxide will selectively take up or reject dopants. This redistribution is governed by the segregation coefficient, which determines how strongly the oxide absorbs or rejects the dopant, and the diffusivity.

The orientation of the silicon crystal affects oxidation. A <100> wafer (see Miller indices) oxidizes more slowly than a <111> wafer, but produces an electrically cleaner oxide interface.

Thermal oxidation of any variety produces a higher-quality oxide, with a much cleaner interface, than chemical vapor deposition of oxide resulting in low temperature oxide layer (reaction of TEOS at about 600 °C). However, the high temperatures required to produce High Temperature Oxide (HTO) restrict its usability. For instance, in MOSFET processes, thermal oxidation is never performed after the doping for the source and drain terminals is performed, because it would disturb the placement of the dopants.

Bibliography

• Jaeger, Richard C. (2001). "Thermal Oxidation of Silicon". Introduction to Microelectronic Fabrication. Upper Saddle River: Prentice Hall. ISBN 978-0-201-44494-0. 

External links

• Online calculator including deal Grove and Massoud oxidation models, with pressure and doping effects at: http://www.lelandstanfordjunior.com/thermaloxide.html